The growing demand for high performance data storage and access in various consumer electronic and computing devices has driven the development of nonvolatile memory (NVM) technologies. Resistive random access memory (ReRAM) is one of alternative NVMs used because of its low operating voltage, high speed and scalability. NVM is employed in computers, mobile computing devices, memory cards, and the like. For more information regarding NVM such as ReRAM, please see commonly assigned U.S. Pat. No. 6,867,996, hereby incorporated by reference in its entirety.
A RAM module is composed of a plurality of memory tiles. Each of the memory tiles further comprises an array of memory cells. The memory cells each represent a “bit” in memory. Each memory cell comprises, minimally, a transistor coupled to a resistive material (1T1R), further coupled to a common source line voltage (CSL). The transistor is further coupled to a bit-line and a word-line.
The size of the memory tile in a RAM module and the number of cells in each memory tile are limited by the impedance of the bitline, CSL and the word line. A bit is modified in the memory cell based on the direction bias across the memory cell. For example, the “set” operation (set pulse) sets a high resistance to a low resistance in the resistive material of the memory cell. A “reset” operation (reset pulse) reverses the polarity of the direction bias, setting a low resistance to a high resistance in the resistive material of the memory cell. Conventionally, the set pulse is applied across the memory cells across several tiles at the same time to obtain high throughput.
However, if some cells are already be in LRS state, applying a set pulse will result in excessive power being consumed to for an operation which is only required for a portion of the memory tiles.
Therefore, there is a need in the art for a memory device with a common source line.